Research Interests

  • Wireless Communications
  • Network Protocols and Simulation
  • Embedded Design
  • VLSI Design and Design Automation
  • Mobile Computing
  • System on Chip

Education

09/2009 - Present
Ph.D. (Candidate)

University of New Brunswick, Fredericton, NB

Courses

  • Robotics
  • Adaptive Filtering
  • Spread Spectrum Communication

Current Status:

Studying to complete the qualification exams, which is a requirement of the School of Graduate Studies for all Ph.D. students.

09/2007 - 10/2009
Master's of Science in Engineering

University of New Brunswick, Fredericton, NB

Courses

  • Wireless Communications (A+)
  • Digital System Design (A+)
  • Bio-medical Instrumentation (A)
  • Operating Systems (A+)
  • Advanced Digital Systems (A+)

Thesis Title:

An Efficient Architecture for Closed-Loop Power-Control Access

Abstract:

In this thesis a cost-effective means to gain access to wireless communication channels is proposed and implemented. A testbed is created using mostly commercial off the shelf components, and the signal processing is implemented in an Alterar DE-3 development board, which includes Altera's Stratix III field programmable gate array, as well as two Terasic ADA boards which provide analog-to-digital and digital-to-analog conversions. Modulation and demodulation was performed on both the forward and reverse channels to bring the signals to an intermediate frequency such that no low pass filter was needed before the signal was acquired by the development board. Testing showed that the CDMA power-control algorithm was able to perform within acceptable limits, and that the implemented system was nearly transparent to both the mobile and the base station. To demonstrate how the system could be used, non{uniform sampling was also implemented in a variety of ways, which included a simple method of incrementally introducing noise.

Link to PDF

09/2002 - 05/2007
Bachelor of Applied Science (Computer Engineering)

Queen's University, Kingston, ON

Relevant Courses:
  • Computer System Architecture
  • Microprocessors
  • Operating Systems
  • Electric Circuits
  • Digital Logic
  • Database Management

Final Project

Stunt Kite Data Gatherer

Project Description

The main goal of this project was to display the flight path of a stunt kite in such a manner that the average person could easily comprehend the basic shape of the path. This was achieved by placing accelerometer sensors on each corner of the kite and storing the recorded data until the kite was landed and the data could be retrieved. Using those readings to linearly interpolate the position and speed of the kite, this data is then used in a custom built application that rendered a three dimensional path of the stunt kite that the user can view from any angle. This project was done as part of a group for our final year project during undergrad.

Other Noteworthy Projects

Investigation of Reverse Channel Utilization in ALOHA Protocols

Conceived in the 60s at the University of Hawaii, the ALOHA protocol has served as a starting point for most packet broadcasting networks. Networking a collection of campuses together that were all within a 300km radius of the main campus where resources were to be shared was the original goal of the ALOHA project. For this paper, an ALOHA protocol simulator was created, and three protocols were simulated and results showed the channel utilization, as well as the total system throughput. It was found that the slotted ALOHA (S-ALOHA) approach showed the highest channel utilization as well as highest total system throughput by a large margin compared to the other two protocols tested.

Mini-RISC Processor

Designed and implemented a mini-RISC on a FLEX10K20 FPGA using the Altera Quartus II software for design and testing using a mixture of the graphical modeling tools as well as VHDL. This was done as lab for an undergraduate course. It's purpose was to show how a processor works by building one from scratch, and how different design decisions can affect the performance and efficiency of the processor.

Computer System Simulation

Simulated a simple computer system consisting of a CPU, and 3 devices to study job flow and do bottleneck analysis. This model used random variables to determine the job arrival rate, as well as the job execution time. Also studied were average system throughput, individual device throughput, as well as the effect of a dual core processor. The model was created and tested using the Java programming language. This project was done as part of a Modeling Systems course.

Teaching Assistantships

  • Data Communications and Networking
  • Communications and Network Engineering

Skills

Programming:

Verilog, VHDL, Assembly, C/C++/C#, Java, Spice, SQL, MatLab, PBasic, Perl, HTML

Software:

Eclipse, Visual Studio, Quartus, MS Office, OpenOffice, Eagle Layout Editor, vim

Operating Systems:

 Windows 98/2000/NT/XP/Vista/7, Linux, OpenBSD

Lab Skills:

 Oscilloscopes, Digital Multimeter, Circuit Prototyping, Soldering, FPGA Programming, Microcontroller Programming

Professional Experience

Computer-Talk Technology
Intern 2006-2007
  • Assisted in high level design and specification creation of an application using information gathered while at a customer site
  • Quickly learned new programming languages to modify customer applications efficiently.
  • Showed initiative by writing scripts to automate testing of future releases of the main product, and had the script display meaningful output in an easy to read format on a web page.

Queen's University
IT Support Staff 2005-2006
  • Effectively communicated to help students and faculty on a one to one basis with hardware and software issues either in person or over the phone.
  • Cleaned computers of potentially harmful viruses and spy ware.
  • Answered questions submitted on-line and gave instructions on how to remedy computer problems through email.

Other Experience

  • Publishing and Copy Center
  • City of Cambridge
  • Pioneer Park Home Hardware
2003-2005
2000-2003
2000

Professional Development

  • IEEE Member
  • Conference, Communication Networks and Services Research
  • Conference, Interview Skills
2005-Present
2008-2009
2006

Community Involvement

  • Member, The Duff Tones
  • Member, University of Waterloo Stage Band
2000-2006
2003-2005

Extra Curricular Activities

  • Queen's Bands Marching Band
  • Queen's Sports Days
  • Preston High School Football Team
  • Preston High School Arts Council Co-Chair
2002-2006
2002-2004
1998-2002
2001-2002
©2009 Brandon C. Brown

Valid HTML 4.01 Transitional Valid CSS!